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STMicroelectronics /STM32L4R9 /ADC /CFGR2

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Interpret as CFGR2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ROVSE)ROVSE 0 (JOVSE)JOVSE 0OVSR0OVSS0 (TROVS)TROVS 0 (ROVSM)ROVSM

Description

configuration register

Fields

ROVSE

DMAEN
JOVSE

DMACFG
OVSR

RES
OVSS

ALIGN
TROVS

Triggered Regular Oversampling
ROVSM

EXTEN

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data