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STMicroelectronics /STM32L4S5 /DBGMCU /APB2_FZR

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Interpret as APB2_FZR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DBG_TIM1_STOP)DBG_TIM1_STOP 0 (DBG_TIM8_STOP)DBG_TIM8_STOP 0 (DBG_TIM15_STOP)DBG_TIM15_STOP 0 (DBG_TIM16_STOP)DBG_TIM16_STOP 0 (DBG_TIM17_STOP)DBG_TIM17_STOP

Description

APB High Freeze Register

Fields

DBG_TIM1_STOP

TIM1 counter stopped when core is halted
DBG_TIM8_STOP

TIM8 counter stopped when core is halted
DBG_TIM15_STOP

TIM15 counter stopped when core is halted
DBG_TIM16_STOP

TIM16 counter stopped when core is halted
DBG_TIM17_STOP

TIM17 counter stopped when core is halted

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data