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STMicroelectronics /STM32L4S5 /DSI /DSI_CCR

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Interpret as DSI_CCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0TXECKDIV0TOCKDIV

Description

DSI HOST Clock Control Register

Fields

TXECKDIV

TX Escape Clock Division
TOCKDIV

Timeout Clock Division

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data