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STMicroelectronics /STM32L4S5 /HASH /CR

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Interpret as CR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (INIT)INIT 0 (DMAE)DMAE 0DATATYPE 0 (MODE)MODE 0 (ALGO0)ALGO0 0NBW0 (DINNE)DINNE 0 (MDMAT)MDMAT 0 (LKEY)LKEY 0 (ALGO1)ALGO1

Description

control register

Fields

INIT

Initialize message digest calculation
DMAE

DMA enable
DATATYPE

Data type selection
MODE

Mode selection
ALGO0

Algorithm selection
NBW

Number of words already pushed
DINNE

DIN not empty
MDMAT

Multiple DMA Transfers
LKEY

Long key selection
ALGO1

ALGO

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data