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STMicroelectronics /STM32L4S7 /DSI /DSI_TCCR1

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Interpret as DSI_TCCR1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0HSRD_TOCNT

Description

DSI Host Timeout Counter Configuration Register 1

Fields

HSRD_TOCNT

High-Speed Read Timeout Counter

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data