STMicroelectronics /STM32L552 /DMA1 /CCR5

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Interpret as CCR5

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (EN)EN 0 (TCIE)TCIE 0 (HTIE)HTIE 0 (TEIE)TEIE 0 (DIR)DIR 0 (CIRC)CIRC 0 (PINC)PINC 0 (MINC)MINC 0PSIZE 0MSIZE 0PL0 (MEM2MEM)MEM2MEM 0 (DBM)DBM 0 (CT)CT 0 (SECM)SECM 0 (SSEC)SSEC 0 (DSEC)DSEC 0 (PRIV)PRIV

Description

channel x configuration register

Fields

EN

Channel enable

TCIE

Transfer complete interrupt enable

HTIE

Half transfer interrupt enable

TEIE

Transfer error interrupt enable

DIR

Data transfer direction

CIRC

Circular mode

PINC

Peripheral increment mode

MINC

Memory increment mode

PSIZE

Peripheral size

MSIZE

Memory size

PL

Channel priority level

MEM2MEM

Memory to memory mode

DBM

double-buffer mode

CT

current target memory of DMA transfer in double-buffer mode

SECM

secure mode

SSEC

security of the DMA transfer from the source

DSEC

security of the DMA transfer to the destination

PRIV

privileged mode

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