STMicroelectronics /STM32L552 /GTZC_TZSC /TZSC_SECCFGR1

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Interpret as TZSC_SECCFGR1

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TIM2SEC)TIM2SEC 0 (TIM3SEC)TIM3SEC 0 (TIM4SEC)TIM4SEC 0 (TIM5SEC)TIM5SEC 0 (TIM6SEC)TIM6SEC 0 (TIM7SEC)TIM7SEC 0 (WWDGSEC)WWDGSEC 0 (IWDGSEC)IWDGSEC 0 (SPI2SEC)SPI2SEC 0 (SPI3SEC)SPI3SEC 0 (USART2SEC)USART2SEC 0 (USART3SEC)USART3SEC 0 (UART4SEC)UART4SEC 0 (UART5SEC)UART5SEC 0 (I2C1SEC)I2C1SEC 0 (I2C2SEC)I2C2SEC 0 (I2C3SEC)I2C3SEC 0 (CRSSEC)CRSSEC 0 (DACSEC)DACSEC 0 (OPAMPSEC)OPAMPSEC 0 (LPTIM1SEC)LPTIM1SEC 0 (LPUART1SEC)LPUART1SEC 0 (I2C4SEC)I2C4SEC 0 (LPTIM2SEC)LPTIM2SEC 0 (LPTIM3SEC)LPTIM3SEC 0 (FDCAN1SEC)FDCAN1SEC 0 (USBFSSEC)USBFSSEC 0 (UCPD1SEC)UCPD1SEC 0 (VREFBUFSEC)VREFBUFSEC 0 (COMPSEC)COMPSEC 0 (TIM1SEC)TIM1SEC 0 (SPI1SEC)SPI1SEC

Description

TZSC secure configuration register 1

Fields

TIM2SEC

TIM2SEC

TIM3SEC

TIM3SEC

TIM4SEC

TIM4SEC

TIM5SEC

TIM5SEC

TIM6SEC

TIM6SEC

TIM7SEC

TIM7SEC

WWDGSEC

WWDGSEC

IWDGSEC

IWDGSEC

SPI2SEC

SPI2SEC

SPI3SEC

SPI3SEC

USART2SEC

USART2SEC

USART3SEC

USART3SEC

UART4SEC

UART4SEC

UART5SEC

UART5SEC

I2C1SEC

I2C1SEC

I2C2SEC

I2C2SEC

I2C3SEC

I2C3SEC

CRSSEC

CRSSEC

DACSEC

DACSEC

OPAMPSEC

OPAMPSEC

LPTIM1SEC

LPTIM1SEC

LPUART1SEC

LPUART1SEC

I2C4SEC

I2C4SEC

LPTIM2SEC

LPTIM2SEC

LPTIM3SEC

LPTIM3SEC

FDCAN1SEC

FDCAN1SEC

USBFSSEC

USBFSSEC

UCPD1SEC

UCPD1SEC

VREFBUFSEC

VREFBUFSEC

COMPSEC

COMPSEC

TIM1SEC

TIM1SEC

SPI1SEC

SPI1SEC

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