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STMicroelectronics /STM32L552 /ICache /ICACHE_CRR2

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Interpret as ICACHE_CRR2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0BASEADDR0RSIZE0 (REN)REN 0REMAPADDR0 (MSTSEL)MSTSEL 0 (HBURST)HBURST

Description

ICACHE region configuration register

Fields

BASEADDR

BASEADDR
RSIZE

RSIZE
REN

REN
REMAPADDR

REMAPADDR
MSTSEL

MSTSEL
HBURST

HBURST

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data