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STMicroelectronics /STM32L552 /OCTOSPI1 /HLCR

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Interpret as HLCR

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https://regviz.com/r/STMicroelectronics/STM32L562/OCTOSPI1/HLCR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0ALTERNATE

Description

HyperBusTM latency configuration register

Fields

ALTERNATE

Alternate bytes

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data