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STMicroelectronics /STM32L552 /RNG /RNG_HTCR

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Interpret as RNG_HTCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0HTCFG

Description

The RNG_DR register is a read-only register that delivers a 32-bit random value when read. The content of this register is valid when DRDY= 1, even if RNGEN=0.

Fields

HTCFG

health test configuration

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data