Regviz

STMicroelectronics /STM32L552 /RTC /SMISR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SMISR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/STMicroelectronics/STM32L562/RTC/SMISR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ALRAMF)ALRAMF 0 (ALRBMF)ALRBMF 0 (WUTMF)WUTMF 0 (TSMF)TSMF 0 (TSOVMF)TSOVMF 0 (ITSMF)ITSMF

Description

RTC secure masked interrupt status register

Fields

ALRAMF

ALRAMF
ALRBMF

ALRBMF
WUTMF

WUTMF
TSMF

TSMF
TSOVMF

TSOVMF
ITSMF

ITSMF

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data