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STMicroelectronics /STM32L552 /TIM1 /SMCR

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Interpret as SMCR

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31282724232019161512118743000000000000000000000000000000000000000000SMS0TS0 (MSM)MSM0ETF0ETPS0 (ECE)ECE0 (ETP)ETP0 (SMS_bit3)SMS_bit3

Description

slave mode control register

Fields

SMS

Slave mode selection
TS

Trigger selection
MSM

Master/Slave mode
ETF

External trigger filter
ETPS

External trigger prescaler
ECE

External clock enable
ETP

External trigger polarity
SMS_bit3

Slave mode selection - bit 3

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data