STMicroelectronics /STM32U073 /DMAMUX /DMAMUX_RG3CR

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Interpret as DMAMUX_RG3CR

GPOL=B_0x0, GE=B_0x0, OIE=B_0x0

Description

DMAMUX request generator channel 3 configuration register

Fields

SIG_ID	Signal identification Selects the DMA request trigger input used for the channel x of the DMA request generator
OIE	Trigger overrun interrupt enable 0 (B_0x0): Interrupt on a trigger overrun event occurrence is disabled 1 (B_0x1): Interrupt on a trigger overrun event occurrence is enabled
GE	DMA request generator channel x enable 0 (B_0x0): DMA request generator channel x disabled 1 (B_0x1): DMA request generator channel x enabled
GPOL	DMA request generator trigger polarity Defines the edge polarity of the selected trigger input 0 (B_0x0): No event, i.e. no trigger detection nor generation. 1 (B_0x1): Rising edge 2 (B_0x2): Falling edge 3 (B_0x3): Rising and falling edges
GNBREQ	Number of DMA requests to be generated (minus 1) Defines the number of DMA requests to be generated after a trigger event. The actual number of generated DMA requests is GNBREQ +1. Note: This field must be written only when GE bit is disabled.

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