RPIF1=B_0x0, RPIF0=B_0x0, RPIF3=B_0x0, RPIF11=B_0x0, RPIF5=B_0x0, RPIF12=B_0x0, RPIF21=B_0x0, RPIF13=B_0x0, RPIF20=B_0x0, RPIF18=B_0x0, RPIF14=B_0x0, RPIF6=B_0x0, RPIF2=B_0x0, RPIF7=B_0x0, RPIF15=B_0x0, RPIF19=B_0x0, RPIF4=B_0x0, RPIF17=B_0x0, RPIF9=B_0x0, RPIF8=B_0x0, RPIF10=B_0x0, RPIF16=B_0x0
EXTI rising edge pending register 1
| RPIF0 | Rising edge event pending for configurable line x (x1=1211to10) Each bit is set upon a rising edge event generated by hardware or by software (through the EXTI_SWIER1 register) on the corresponding line. Each bit is cleared by writing 1 into it. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): No rising edge trigger request occurred 1 (B_0x1): Rising edge trigger request occurred |
| RPIF1 | Rising edge event pending for configurable line x (x1=1211to10) Each bit is set upon a rising edge event generated by hardware or by software (through the EXTI_SWIER1 register) on the corresponding line. Each bit is cleared by writing 1 into it. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): No rising edge trigger request occurred 1 (B_0x1): Rising edge trigger request occurred |
| RPIF2 | Rising edge event pending for configurable line x (x1=1211to10) Each bit is set upon a rising edge event generated by hardware or by software (through the EXTI_SWIER1 register) on the corresponding line. Each bit is cleared by writing 1 into it. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): No rising edge trigger request occurred 1 (B_0x1): Rising edge trigger request occurred |
| RPIF3 | Rising edge event pending for configurable line x (x1=1211to10) Each bit is set upon a rising edge event generated by hardware or by software (through the EXTI_SWIER1 register) on the corresponding line. Each bit is cleared by writing 1 into it. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): No rising edge trigger request occurred 1 (B_0x1): Rising edge trigger request occurred |
| RPIF4 | Rising edge event pending for configurable line x (x1=1211to10) Each bit is set upon a rising edge event generated by hardware or by software (through the EXTI_SWIER1 register) on the corresponding line. Each bit is cleared by writing 1 into it. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): No rising edge trigger request occurred 1 (B_0x1): Rising edge trigger request occurred |
| RPIF5 | Rising edge event pending for configurable line x (x1=1211to10) Each bit is set upon a rising edge event generated by hardware or by software (through the EXTI_SWIER1 register) on the corresponding line. Each bit is cleared by writing 1 into it. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): No rising edge trigger request occurred 1 (B_0x1): Rising edge trigger request occurred |
| RPIF6 | Rising edge event pending for configurable line x (x1=1211to10) Each bit is set upon a rising edge event generated by hardware or by software (through the EXTI_SWIER1 register) on the corresponding line. Each bit is cleared by writing 1 into it. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): No rising edge trigger request occurred 1 (B_0x1): Rising edge trigger request occurred |
| RPIF7 | Rising edge event pending for configurable line x (x1=1211to10) Each bit is set upon a rising edge event generated by hardware or by software (through the EXTI_SWIER1 register) on the corresponding line. Each bit is cleared by writing 1 into it. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): No rising edge trigger request occurred 1 (B_0x1): Rising edge trigger request occurred |
| RPIF8 | Rising edge event pending for configurable line x (x1=1211to10) Each bit is set upon a rising edge event generated by hardware or by software (through the EXTI_SWIER1 register) on the corresponding line. Each bit is cleared by writing 1 into it. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): No rising edge trigger request occurred 1 (B_0x1): Rising edge trigger request occurred |
| RPIF9 | Rising edge event pending for configurable line x (x1=1211to10) Each bit is set upon a rising edge event generated by hardware or by software (through the EXTI_SWIER1 register) on the corresponding line. Each bit is cleared by writing 1 into it. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): No rising edge trigger request occurred 1 (B_0x1): Rising edge trigger request occurred |
| RPIF10 | Rising edge event pending for configurable line x (x1=1211to10) Each bit is set upon a rising edge event generated by hardware or by software (through the EXTI_SWIER1 register) on the corresponding line. Each bit is cleared by writing 1 into it. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): No rising edge trigger request occurred 1 (B_0x1): Rising edge trigger request occurred |
| RPIF11 | Rising edge event pending for configurable line x (x1=1211to10) Each bit is set upon a rising edge event generated by hardware or by software (through the EXTI_SWIER1 register) on the corresponding line. Each bit is cleared by writing 1 into it. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): No rising edge trigger request occurred 1 (B_0x1): Rising edge trigger request occurred |
| RPIF12 | Rising edge event pending for configurable line x (x1=1211to10) Each bit is set upon a rising edge event generated by hardware or by software (through the EXTI_SWIER1 register) on the corresponding line. Each bit is cleared by writing 1 into it. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): No rising edge trigger request occurred 1 (B_0x1): Rising edge trigger request occurred |
| RPIF13 | Rising edge event pending for configurable line x (x1=1211to10) Each bit is set upon a rising edge event generated by hardware or by software (through the EXTI_SWIER1 register) on the corresponding line. Each bit is cleared by writing 1 into it. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): No rising edge trigger request occurred 1 (B_0x1): Rising edge trigger request occurred |
| RPIF14 | Rising edge event pending for configurable line x (x1=1211to10) Each bit is set upon a rising edge event generated by hardware or by software (through the EXTI_SWIER1 register) on the corresponding line. Each bit is cleared by writing 1 into it. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): No rising edge trigger request occurred 1 (B_0x1): Rising edge trigger request occurred |
| RPIF15 | Rising edge event pending for configurable line x (x1=1211to10) Each bit is set upon a rising edge event generated by hardware or by software (through the EXTI_SWIER1 register) on the corresponding line. Each bit is cleared by writing 1 into it. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): No rising edge trigger request occurred 1 (B_0x1): Rising edge trigger request occurred |
| RPIF16 | Rising edge event pending for configurable line x (x1=1211to10) Each bit is set upon a rising edge event generated by hardware or by software (through the EXTI_SWIER1 register) on the corresponding line. Each bit is cleared by writing 1 into it. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): No rising edge trigger request occurred 1 (B_0x1): Rising edge trigger request occurred |
| RPIF17 | Rising edge event pending for configurable line x (x1=1211to10) Each bit is set upon a rising edge event generated by hardware or by software (through the EXTI_SWIER1 register) on the corresponding line. Each bit is cleared by writing 1 into it. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): No rising edge trigger request occurred 1 (B_0x1): Rising edge trigger request occurred |
| RPIF18 | Rising edge event pending for configurable line x (x1=1211to10) Each bit is set upon a rising edge event generated by hardware or by software (through the EXTI_SWIER1 register) on the corresponding line. Each bit is cleared by writing 1 into it. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): No rising edge trigger request occurred 1 (B_0x1): Rising edge trigger request occurred |
| RPIF19 | Rising edge event pending for configurable line x (x1=1211to10) Each bit is set upon a rising edge event generated by hardware or by software (through the EXTI_SWIER1 register) on the corresponding line. Each bit is cleared by writing 1 into it. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): No rising edge trigger request occurred 1 (B_0x1): Rising edge trigger request occurred |
| RPIF20 | Rising edge event pending for configurable line x (x1=1211to10) Each bit is set upon a rising edge event generated by hardware or by software (through the EXTI_SWIER1 register) on the corresponding line. Each bit is cleared by writing 1 into it. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): No rising edge trigger request occurred 1 (B_0x1): Rising edge trigger request occurred |
| RPIF21 | Rising edge event pending for configurable line x (x1=1211to10) Each bit is set upon a rising edge event generated by hardware or by software (through the EXTI_SWIER1 register) on the corresponding line. Each bit is cleared by writing 1 into it. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): No rising edge trigger request occurred 1 (B_0x1): Rising edge trigger request occurred |