STMicroelectronics /STM32U073 /GPIOE /GPIOE_LCKR

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Interpret as GPIOE_LCKR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)LCK0 0 (B_0x0)LCK1 0 (B_0x0)LCK2 0 (B_0x0)LCK3 0 (B_0x0)LCK4 0 (B_0x0)LCK5 0 (B_0x0)LCK6 0 (B_0x0)LCK7 0 (B_0x0)LCK8 0 (B_0x0)LCK9 0 (B_0x0)LCK10 0 (B_0x0)LCK11 0 (B_0x0)LCK12 0 (B_0x0)LCK13 0 (B_0x0)LCK14 0 (B_0x0)LCK15 0 (B_0x0)LCKK

LCK6=B_0x0, LCKK=B_0x0, LCK14=B_0x0, LCK1=B_0x0, LCK5=B_0x0, LCK2=B_0x0, LCK15=B_0x0, LCK12=B_0x0, LCK10=B_0x0, LCK9=B_0x0, LCK8=B_0x0, LCK13=B_0x0, LCK7=B_0x0, LCK3=B_0x0, LCK11=B_0x0, LCK0=B_0x0, LCK4=B_0x0

Description

GPIO port configuration lock register

Fields

LCK0

Port x lock I/O pin y These bits are read/write but can only be written when the LCKK bit is 0.

0 (B_0x0): Port configuration not locked

1 (B_0x1): Port configuration locked

LCK1

Port x lock I/O pin y These bits are read/write but can only be written when the LCKK bit is 0.

0 (B_0x0): Port configuration not locked

1 (B_0x1): Port configuration locked

LCK2

Port x lock I/O pin y These bits are read/write but can only be written when the LCKK bit is 0.

0 (B_0x0): Port configuration not locked

1 (B_0x1): Port configuration locked

LCK3

Port x lock I/O pin y These bits are read/write but can only be written when the LCKK bit is 0.

0 (B_0x0): Port configuration not locked

1 (B_0x1): Port configuration locked

LCK4

Port x lock I/O pin y These bits are read/write but can only be written when the LCKK bit is 0.

0 (B_0x0): Port configuration not locked

1 (B_0x1): Port configuration locked

LCK5

Port x lock I/O pin y These bits are read/write but can only be written when the LCKK bit is 0.

0 (B_0x0): Port configuration not locked

1 (B_0x1): Port configuration locked

LCK6

Port x lock I/O pin y These bits are read/write but can only be written when the LCKK bit is 0.

0 (B_0x0): Port configuration not locked

1 (B_0x1): Port configuration locked

LCK7

Port x lock I/O pin y These bits are read/write but can only be written when the LCKK bit is 0.

0 (B_0x0): Port configuration not locked

1 (B_0x1): Port configuration locked

LCK8

Port x lock I/O pin y These bits are read/write but can only be written when the LCKK bit is 0.

0 (B_0x0): Port configuration not locked

1 (B_0x1): Port configuration locked

LCK9

Port x lock I/O pin y These bits are read/write but can only be written when the LCKK bit is 0.

0 (B_0x0): Port configuration not locked

1 (B_0x1): Port configuration locked

LCK10

Port x lock I/O pin y These bits are read/write but can only be written when the LCKK bit is 0.

0 (B_0x0): Port configuration not locked

1 (B_0x1): Port configuration locked

LCK11

Port x lock I/O pin y These bits are read/write but can only be written when the LCKK bit is 0.

0 (B_0x0): Port configuration not locked

1 (B_0x1): Port configuration locked

LCK12

Port x lock I/O pin y These bits are read/write but can only be written when the LCKK bit is 0.

0 (B_0x0): Port configuration not locked

1 (B_0x1): Port configuration locked

LCK13

Port x lock I/O pin y These bits are read/write but can only be written when the LCKK bit is 0.

0 (B_0x0): Port configuration not locked

1 (B_0x1): Port configuration locked

LCK14

Port x lock I/O pin y These bits are read/write but can only be written when the LCKK bit is 0.

0 (B_0x0): Port configuration not locked

1 (B_0x1): Port configuration locked

LCK15

Port x lock I/O pin y These bits are read/write but can only be written when the LCKK bit is 0.

0 (B_0x0): Port configuration not locked

1 (B_0x1): Port configuration locked

LCKK

Lock key This bit can be read any time. It can only be modified using the lock key write sequence. LOCK key write sequence: WR LCKR[16] = 1 + LCKR[15:0] WR LCKR[16] = 0 + LCKR[15:0] WR LCKR[16] = 1 + LCKR[15:0] RD LCKR RD LCKR[16] = 1 (this read operation is optional but it confirms that the lock is active) Note: During the LOCK key write sequence, the value of LCK[15:0] must not change. Note: Any error in the lock sequence aborts the lock. Note: After the first lock sequence on any bit of the port, any read access on the LCKK bit returns 1 until the next MCU reset or peripheral reset.

0 (B_0x0): Port configuration lock key not active

1 (B_0x1): Port configuration lock key active. The GPIOx_LCKR register is locked until the next MCU reset or peripheral reset.

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