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STMicroelectronics /STM32U073 /LCD /LCD_CLR

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Interpret as LCD_CLR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)SOFC 0 (B_0x0)UDDC

UDDC=B_0x0, SOFC=B_0x0

Description

LCD clear register

Fields

SOFC

Start-of-frame flag clear This bit is written by software to clear SOF in LCD_SR.

0 (B_0x0): No effect

1 (B_0x1): Clear SOF flag.
UDDC

Update display done clear This bit is written by software to clear UDD in LCD_SR.

0 (B_0x0): No effect

1 (B_0x1): Clear UDD flag.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data