TSCEN=B_0x0, RNGEN=B_0x0, FLASHEN=B_0x0, CRCEN=B_0x0, DMA2EN=B_0x0, DMA1EN=B_0x0
AHB peripheral clock enable register
| DMA1EN | DMA1 and DMAMUX clock enable Set and cleared by software. DMAMUX is enabled as long as at least one DMA peripheral is enabled. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| DMA2EN | DMA2 and DMAMUX clock enable Set and cleared by software. DMAMUX is enabled as long as at least one DMA peripheral is enabled. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| FLASHEN | Flash memory interface clock enable Set and cleared by software. This bit can only be cleared when the flash memory is in power down mode. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| CRCEN | CRC clock enable Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| RNGEN | Random number generator clock enable Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| TSCEN | Touch sensing controller clock enable Set and cleared by software. 0 (B_0x0): TSC clock disable 1 (B_0x1): TSC clock enable |