TAMPPUDIS=B_0x0, TAMPFREQ=B_0x0, TAMPFLT=B_0x0, TAMPPRCH=B_0x0
TAMP filter control register
| TAMPFREQ | Tamper sampling frequency Determines the frequency at which each of the TAMP_INx inputs are sampled. 0 (B_0x0): RTCCLK / 32768 (11Hz when RTCCLK = 327681Hz) 1 (B_0x1): RTCCLK / 16384 (21Hz when RTCCLK = 327681Hz) 2 (B_0x2): RTCCLK / 8192 (41Hz when RTCCLK = 327681Hz) 3 (B_0x3): RTCCLK / 4096 (81Hz when RTCCLK = 327681Hz) 4 (B_0x4): RTCCLK / 2048 (161Hz when RTCCLK = 327681Hz) 5 (B_0x5): RTCCLK / 1024 (321Hz when RTCCLK = 327681Hz) 6 (B_0x6): RTCCLK / 512 (641Hz when RTCCLK = 327681Hz) 7 (B_0x7): RTCCLK / 256 (1281Hz when RTCCLK = 327681Hz) |
| TAMPFLT | TAMP_INx filter count These bits determines the number of consecutive samples at the specified level (TAMP*TRG) needed to activate a tamper event. TAMPFLT is valid for each of the TAMP_INx inputs. 0 (B_0x0): Tamper event is activated on edge of TAMP_INx input transitions to the active level (no internal pull-up on TAMP_INx input). 1 (B_0x1): Tamper event is activated after 2 consecutive samples at the active level. 2 (B_0x2): Tamper event is activated after 4 consecutive samples at the active level. 3 (B_0x3): Tamper event is activated after 8 consecutive samples at the active level. |
| TAMPPRCH | TAMP_INx precharge duration These bit determines the duration of time during which the pull-up/is activated before each sample. TAMPPRCH is valid for each of the TAMP_INx inputs. 0 (B_0x0): 1 RTCCLK cycle 1 (B_0x1): 2 RTCCLK cycles 2 (B_0x2): 4 RTCCLK cycles 3 (B_0x3): 8 RTCCLK cycles |
| TAMPPUDIS | TAMP_INx pull-up disable This bit determines if each of the TAMPx pins are precharged before each sample. 0 (B_0x0): Precharge TAMP_INx pins before sampling (enable internal pull-up) 1 (B_0x1): Disable precharge of TAMP_INx pins. |