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STMicroelectronics /STM32U073 /TIM2 /TIM2_CCMR2

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Interpret as TIM2_CCMR2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)CC3S 0IC3PSC 0IC3F0 (B_0x0)CC4S 0IC4PSC 0IC4F

CC4S=B_0x0, CC3S=B_0x0

Description

TIM2 capture/compare mode register 2

Fields

CC3S

Capture/Compare 3 selection

0 (B_0x0): CC3 channel is configured as output

1 (B_0x1): CC3 channel is configured as input, IC3 is mapped on TI3

2 (B_0x2): CC3 channel is configured as input, IC3 is mapped on TI4

3 (B_0x3): CC3 channel is configured as input, IC3 is mapped on TRC.
IC3PSC

Input capture 3 prescaler
IC3F

Input capture 3 filter
CC4S

Capture/Compare 4 selection

0 (B_0x0): CC4 channel is configured as output

1 (B_0x1): CC4 channel is configured as input, IC4 is mapped on TI4

2 (B_0x2): CC4 channel is configured as input, IC4 is mapped on TI3

3 (B_0x3): CC4 channel is configured as input, IC4 is mapped on TRC.
IC4PSC

Input capture 4 prescaler
IC4F

Input capture 4 filter

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data