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STMicroelectronics /STM32U073 /TSC /TSC_IOASCR

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Interpret as TSC_IOASCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)G1_IO1 0 (B_0x0)G1_IO2 0 (B_0x0)G1_IO3 0 (B_0x0)G1_IO4 0 (B_0x0)G2_IO1 0 (B_0x0)G2_IO2 0 (B_0x0)G2_IO3 0 (B_0x0)G2_IO4 0 (B_0x0)G3_IO1 0 (B_0x0)G3_IO2 0 (B_0x0)G3_IO3 0 (B_0x0)G3_IO4 0 (B_0x0)G4_IO1 0 (B_0x0)G4_IO2 0 (B_0x0)G4_IO3 0 (B_0x0)G4_IO4 0 (B_0x0)G5_IO1 0 (B_0x0)G5_IO2 0 (B_0x0)G5_IO3 0 (B_0x0)G5_IO4 0 (B_0x0)G6_IO1 0 (B_0x0)G6_IO2 0 (B_0x0)G6_IO3 0 (B_0x0)G6_IO4 0 (B_0x0)G7_IO1 0 (B_0x0)G7_IO2 0 (B_0x0)G7_IO3 0 (B_0x0)G7_IO4

G4_IO4=B_0x0, G3_IO1=B_0x0, G7_IO3=B_0x0, G5_IO1=B_0x0, G6_IO3=B_0x0, G6_IO2=B_0x0, G5_IO3=B_0x0, G4_IO1=B_0x0, G3_IO4=B_0x0, G3_IO3=B_0x0, G7_IO2=B_0x0, G7_IO4=B_0x0, G3_IO2=B_0x0, G2_IO4=B_0x0, G1_IO4=B_0x0, G1_IO2=B_0x0, G7_IO1=B_0x0, G6_IO1=B_0x0, G5_IO4=B_0x0, G4_IO3=B_0x0, G4_IO2=B_0x0, G1_IO3=B_0x0, G1_IO1=B_0x0, G5_IO2=B_0x0, G6_IO4=B_0x0, G2_IO1=B_0x0, G2_IO3=B_0x0, G2_IO2=B_0x0

Description

TSC I/O analog switch control register

Fields

G1_IO1

Gx_IOy analog switch enable These bits are set and cleared by software to enable/disable the Gx_IOy analog switch. Note: These bits control the I/O analog switch whatever the I/O control mode is (even if controlled by standard GPIO registers).

0 (B_0x0): Gx_IOy analog switch disabled (opened)

1 (B_0x1): Gx_IOy analog switch enabled (closed)
G1_IO2

Gx_IOy analog switch enable These bits are set and cleared by software to enable/disable the Gx_IOy analog switch. Note: These bits control the I/O analog switch whatever the I/O control mode is (even if controlled by standard GPIO registers).

0 (B_0x0): Gx_IOy analog switch disabled (opened)

1 (B_0x1): Gx_IOy analog switch enabled (closed)
G1_IO3

Gx_IOy analog switch enable These bits are set and cleared by software to enable/disable the Gx_IOy analog switch. Note: These bits control the I/O analog switch whatever the I/O control mode is (even if controlled by standard GPIO registers).

0 (B_0x0): Gx_IOy analog switch disabled (opened)

1 (B_0x1): Gx_IOy analog switch enabled (closed)
G1_IO4

Gx_IOy analog switch enable These bits are set and cleared by software to enable/disable the Gx_IOy analog switch. Note: These bits control the I/O analog switch whatever the I/O control mode is (even if controlled by standard GPIO registers).

0 (B_0x0): Gx_IOy analog switch disabled (opened)

1 (B_0x1): Gx_IOy analog switch enabled (closed)
G2_IO1

Gx_IOy analog switch enable These bits are set and cleared by software to enable/disable the Gx_IOy analog switch. Note: These bits control the I/O analog switch whatever the I/O control mode is (even if controlled by standard GPIO registers).

0 (B_0x0): Gx_IOy analog switch disabled (opened)

1 (B_0x1): Gx_IOy analog switch enabled (closed)
G2_IO2

Gx_IOy analog switch enable These bits are set and cleared by software to enable/disable the Gx_IOy analog switch. Note: These bits control the I/O analog switch whatever the I/O control mode is (even if controlled by standard GPIO registers).

0 (B_0x0): Gx_IOy analog switch disabled (opened)

1 (B_0x1): Gx_IOy analog switch enabled (closed)
G2_IO3

Gx_IOy analog switch enable These bits are set and cleared by software to enable/disable the Gx_IOy analog switch. Note: These bits control the I/O analog switch whatever the I/O control mode is (even if controlled by standard GPIO registers).

0 (B_0x0): Gx_IOy analog switch disabled (opened)

1 (B_0x1): Gx_IOy analog switch enabled (closed)
G2_IO4

Gx_IOy analog switch enable These bits are set and cleared by software to enable/disable the Gx_IOy analog switch. Note: These bits control the I/O analog switch whatever the I/O control mode is (even if controlled by standard GPIO registers).

0 (B_0x0): Gx_IOy analog switch disabled (opened)

1 (B_0x1): Gx_IOy analog switch enabled (closed)
G3_IO1

Gx_IOy analog switch enable These bits are set and cleared by software to enable/disable the Gx_IOy analog switch. Note: These bits control the I/O analog switch whatever the I/O control mode is (even if controlled by standard GPIO registers).

0 (B_0x0): Gx_IOy analog switch disabled (opened)

1 (B_0x1): Gx_IOy analog switch enabled (closed)
G3_IO2

Gx_IOy analog switch enable These bits are set and cleared by software to enable/disable the Gx_IOy analog switch. Note: These bits control the I/O analog switch whatever the I/O control mode is (even if controlled by standard GPIO registers).

0 (B_0x0): Gx_IOy analog switch disabled (opened)

1 (B_0x1): Gx_IOy analog switch enabled (closed)
G3_IO3

Gx_IOy analog switch enable These bits are set and cleared by software to enable/disable the Gx_IOy analog switch. Note: These bits control the I/O analog switch whatever the I/O control mode is (even if controlled by standard GPIO registers).

0 (B_0x0): Gx_IOy analog switch disabled (opened)

1 (B_0x1): Gx_IOy analog switch enabled (closed)
G3_IO4

Gx_IOy analog switch enable These bits are set and cleared by software to enable/disable the Gx_IOy analog switch. Note: These bits control the I/O analog switch whatever the I/O control mode is (even if controlled by standard GPIO registers).

0 (B_0x0): Gx_IOy analog switch disabled (opened)

1 (B_0x1): Gx_IOy analog switch enabled (closed)
G4_IO1

Gx_IOy analog switch enable These bits are set and cleared by software to enable/disable the Gx_IOy analog switch. Note: These bits control the I/O analog switch whatever the I/O control mode is (even if controlled by standard GPIO registers).

0 (B_0x0): Gx_IOy analog switch disabled (opened)

1 (B_0x1): Gx_IOy analog switch enabled (closed)
G4_IO2

Gx_IOy analog switch enable These bits are set and cleared by software to enable/disable the Gx_IOy analog switch. Note: These bits control the I/O analog switch whatever the I/O control mode is (even if controlled by standard GPIO registers).

0 (B_0x0): Gx_IOy analog switch disabled (opened)

1 (B_0x1): Gx_IOy analog switch enabled (closed)
G4_IO3

Gx_IOy analog switch enable These bits are set and cleared by software to enable/disable the Gx_IOy analog switch. Note: These bits control the I/O analog switch whatever the I/O control mode is (even if controlled by standard GPIO registers).

0 (B_0x0): Gx_IOy analog switch disabled (opened)

1 (B_0x1): Gx_IOy analog switch enabled (closed)
G4_IO4

Gx_IOy analog switch enable These bits are set and cleared by software to enable/disable the Gx_IOy analog switch. Note: These bits control the I/O analog switch whatever the I/O control mode is (even if controlled by standard GPIO registers).

0 (B_0x0): Gx_IOy analog switch disabled (opened)

1 (B_0x1): Gx_IOy analog switch enabled (closed)
G5_IO1

Gx_IOy analog switch enable These bits are set and cleared by software to enable/disable the Gx_IOy analog switch. Note: These bits control the I/O analog switch whatever the I/O control mode is (even if controlled by standard GPIO registers).

0 (B_0x0): Gx_IOy analog switch disabled (opened)

1 (B_0x1): Gx_IOy analog switch enabled (closed)
G5_IO2

Gx_IOy analog switch enable These bits are set and cleared by software to enable/disable the Gx_IOy analog switch. Note: These bits control the I/O analog switch whatever the I/O control mode is (even if controlled by standard GPIO registers).

0 (B_0x0): Gx_IOy analog switch disabled (opened)

1 (B_0x1): Gx_IOy analog switch enabled (closed)
G5_IO3

Gx_IOy analog switch enable These bits are set and cleared by software to enable/disable the Gx_IOy analog switch. Note: These bits control the I/O analog switch whatever the I/O control mode is (even if controlled by standard GPIO registers).

0 (B_0x0): Gx_IOy analog switch disabled (opened)

1 (B_0x1): Gx_IOy analog switch enabled (closed)
G5_IO4

Gx_IOy analog switch enable These bits are set and cleared by software to enable/disable the Gx_IOy analog switch. Note: These bits control the I/O analog switch whatever the I/O control mode is (even if controlled by standard GPIO registers).

0 (B_0x0): Gx_IOy analog switch disabled (opened)

1 (B_0x1): Gx_IOy analog switch enabled (closed)
G6_IO1

Gx_IOy analog switch enable These bits are set and cleared by software to enable/disable the Gx_IOy analog switch. Note: These bits control the I/O analog switch whatever the I/O control mode is (even if controlled by standard GPIO registers).

0 (B_0x0): Gx_IOy analog switch disabled (opened)

1 (B_0x1): Gx_IOy analog switch enabled (closed)
G6_IO2

Gx_IOy analog switch enable These bits are set and cleared by software to enable/disable the Gx_IOy analog switch. Note: These bits control the I/O analog switch whatever the I/O control mode is (even if controlled by standard GPIO registers).

0 (B_0x0): Gx_IOy analog switch disabled (opened)

1 (B_0x1): Gx_IOy analog switch enabled (closed)
G6_IO3

Gx_IOy analog switch enable These bits are set and cleared by software to enable/disable the Gx_IOy analog switch. Note: These bits control the I/O analog switch whatever the I/O control mode is (even if controlled by standard GPIO registers).

0 (B_0x0): Gx_IOy analog switch disabled (opened)

1 (B_0x1): Gx_IOy analog switch enabled (closed)
G6_IO4

Gx_IOy analog switch enable These bits are set and cleared by software to enable/disable the Gx_IOy analog switch. Note: These bits control the I/O analog switch whatever the I/O control mode is (even if controlled by standard GPIO registers).

0 (B_0x0): Gx_IOy analog switch disabled (opened)

1 (B_0x1): Gx_IOy analog switch enabled (closed)
G7_IO1

Gx_IOy analog switch enable These bits are set and cleared by software to enable/disable the Gx_IOy analog switch. Note: These bits control the I/O analog switch whatever the I/O control mode is (even if controlled by standard GPIO registers).

0 (B_0x0): Gx_IOy analog switch disabled (opened)

1 (B_0x1): Gx_IOy analog switch enabled (closed)
G7_IO2

Gx_IOy analog switch enable These bits are set and cleared by software to enable/disable the Gx_IOy analog switch. Note: These bits control the I/O analog switch whatever the I/O control mode is (even if controlled by standard GPIO registers).

0 (B_0x0): Gx_IOy analog switch disabled (opened)

1 (B_0x1): Gx_IOy analog switch enabled (closed)
G7_IO3

Gx_IOy analog switch enable These bits are set and cleared by software to enable/disable the Gx_IOy analog switch. Note: These bits control the I/O analog switch whatever the I/O control mode is (even if controlled by standard GPIO registers).

0 (B_0x0): Gx_IOy analog switch disabled (opened)

1 (B_0x1): Gx_IOy analog switch enabled (closed)
G7_IO4

Gx_IOy analog switch enable These bits are set and cleared by software to enable/disable the Gx_IOy analog switch. Note: These bits control the I/O analog switch whatever the I/O control mode is (even if controlled by standard GPIO registers).

0 (B_0x0): Gx_IOy analog switch disabled (opened)

1 (B_0x1): Gx_IOy analog switch enabled (closed)

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data