SEC_PROT=B_0x0, RDERRIE=B_0x0, PER=B_0x0, PG=B_0x0, PNB=B_0x0, ERRIE=B_0x0, EOPIE=B_0x0, FSTPG=B_0x0
FLASH control register
| PG | Flash memory programming enable 0 (B_0x0): Disable 1 (B_0x1): Enable |
| PER | Page erase enable 0 (B_0x0): Disable 1 (B_0x1): Enable |
| MER1 | Mass erase When set, this bit triggers the mass erase, that is, all user pages. |
| PNB | Page number selection These bits select the page to erase: … Note: Values corresponding to addresses outside the main memory are not allowed. 0 (B_0x0): page 0 1 (B_0x1): page 1 15 (B_0xF): page 15 |
| STRT | Start erase operation This bit triggers an erase operation when set. This bit is possible to set only by software and to clear only by hardware. The hardware clears it when one of BSY1 and BSY2 flags in the FLASH_SR register transits to zero. |
| OPTSTRT | Start of modification of option bytes This bit triggers an options operation when set. This bit is set only by software, and is cleared when the BSY1 bit is cleared in FLASH_SR. |
| FSTPG | Fast programming enable 0 (B_0x0): Disable 1 (B_0x1): Enable |
| EOPIE | End-of-operation interrupt enable This bit enables the interrupt generation upon setting the EOP flag in the FLASH_SR register. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| ERRIE | Error interrupt enable This bit enables the interrupt generation upon setting the OPERR flag in the FLASH_SR register. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| RDERRIE | PCROP read error interrupt enable This bit enables the interrupt generation upon setting the RDERR flag in the FLASH_SR register. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| OBL_LAUNCH | Option byte load launch When set, this bit triggers the load of option bytes into option registers. It is automatically cleared upon the completion of the load. The high state of the bit indicates pending option byte load. The bit cannot be cleared by software. It cannot be written as long as OPTLOCK is set. |
| SEC_PROT | Securable memory area protection enable This bit enables the protection on securable area, provided that a non-null securable memory area size (SEC_SIZE[4:0]) is defined in option bytes. This bit is possible to set only by software and to clear only through a system reset. 0 (B_0x0): Disable (securable area accessible) 1 (B_0x1): Enable (securable area not accessible) |
| OPTLOCK | Options Lock This bit is set only. When set, all bits concerning user option in FLASH_CR register and so option page are locked. This bit is cleared by hardware after detecting the unlock sequence. The LOCK bit must be cleared before doing the unlock sequence for OPTLOCK bit. In case of an unsuccessful unlock operation, this bit remains set until the next reset. |
| LOCK | FLASH_CR Lock This bit is set only. When set, the FLASH_CR register is locked. It is cleared by hardware after detecting the unlock sequence. In case of an unsuccessful unlock operation, this bit remains set until the next system reset. |