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STMicroelectronics /STM32U083 /PWR /PWR_PDCRF

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Interpret as PWR_PDCRF

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PD0)PD0 0 (PD1)PD1 0 (PD2)PD2 0 (PD3)PD3

Description

Power Port F pull-down control register

Fields

PD0

Port F pull-down bit y When set, this bit activates the pull-down on PH[y] when APC bit is set in PWR_CR3 register.
PD1

Port F pull-down bit y When set, this bit activates the pull-down on PH[y] when APC bit is set in PWR_CR3 register.
PD2

Port F pull-down bit y When set, this bit activates the pull-down on PH[y] when APC bit is set in PWR_CR3 register.
PD3

Port F pull-down bit y When set, this bit activates the pull-down on PH[y] when APC bit is set in PWR_CR3 register.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data