RegViz: Visualize TSC_IOHCR Bitfield

STMicroelectronics /STM32U083 /TSC /TSC_IOHCR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as TSC_IOHCR

G6_IO1=B_0x0, G3_IO3=B_0x0, G4_IO1=B_0x0, G2_IO1=B_0x0, G1_IO3=B_0x0, G5_IO2=B_0x0, G2_IO4=B_0x0, G5_IO4=B_0x0, G5_IO3=B_0x0, G6_IO4=B_0x0, G5_IO1=B_0x0, G7_IO3=B_0x0, G4_IO2=B_0x0, G2_IO2=B_0x0, G7_IO4=B_0x0, G6_IO3=B_0x0, G2_IO3=B_0x0, G1_IO1=B_0x0, G4_IO3=B_0x0, G3_IO1=B_0x0, G3_IO2=B_0x0, G3_IO4=B_0x0, G1_IO4=B_0x0, G1_IO2=B_0x0, G7_IO1=B_0x0, G6_IO2=B_0x0, G4_IO4=B_0x0, G7_IO2=B_0x0

Description

TSC I/O hysteresis control register

Fields

G1_IO1	Gx_IOy Schmitt trigger hysteresis mode These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled
G1_IO2	Gx_IOy Schmitt trigger hysteresis mode These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled
G1_IO3	Gx_IOy Schmitt trigger hysteresis mode These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled
G1_IO4	Gx_IOy Schmitt trigger hysteresis mode These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled
G2_IO1	Gx_IOy Schmitt trigger hysteresis mode These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled
G2_IO2	Gx_IOy Schmitt trigger hysteresis mode These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled
G2_IO3	Gx_IOy Schmitt trigger hysteresis mode These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled
G2_IO4	Gx_IOy Schmitt trigger hysteresis mode These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled
G3_IO1	Gx_IOy Schmitt trigger hysteresis mode These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled
G3_IO2	Gx_IOy Schmitt trigger hysteresis mode These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled
G3_IO3	Gx_IOy Schmitt trigger hysteresis mode These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled
G3_IO4	Gx_IOy Schmitt trigger hysteresis mode These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled
G4_IO1	Gx_IOy Schmitt trigger hysteresis mode These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled
G4_IO2	Gx_IOy Schmitt trigger hysteresis mode These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled
G4_IO3	Gx_IOy Schmitt trigger hysteresis mode These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled
G4_IO4	Gx_IOy Schmitt trigger hysteresis mode These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled
G5_IO1	Gx_IOy Schmitt trigger hysteresis mode These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled
G5_IO2	Gx_IOy Schmitt trigger hysteresis mode These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled
G5_IO3	Gx_IOy Schmitt trigger hysteresis mode These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled
G5_IO4	Gx_IOy Schmitt trigger hysteresis mode These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled
G6_IO1	Gx_IOy Schmitt trigger hysteresis mode These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled
G6_IO2	Gx_IOy Schmitt trigger hysteresis mode These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled
G6_IO3	Gx_IOy Schmitt trigger hysteresis mode These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled
G6_IO4	Gx_IOy Schmitt trigger hysteresis mode These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled
G7_IO1	Gx_IOy Schmitt trigger hysteresis mode These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled
G7_IO2	Gx_IOy Schmitt trigger hysteresis mode These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled
G7_IO3	Gx_IOy Schmitt trigger hysteresis mode These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled
G7_IO4	Gx_IOy Schmitt trigger hysteresis mode These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled

Links

()