VP_SEL=B_0x0, VM_SEL=B_0x0, OPALPM=B_0x0, OPAEN=B_0x0, CALSEL=B_0x0, CALON=B_0x0, OPAHSM=B_0x0, USERTRIM=B_0x0, PGA_GAIN=B_0x0
OPAMP2 control/status register
| OPAEN | OPAMP enable 0 (B_0x0): OPAMP disabled 1 (B_0x1): OPAMP enabled |
| OPALPM | OPAMP low-power mode The OPAMP must be disabled to change this configuration. 0 (B_0x0): normal mode 1 (B_0x1): low-power mode |
| OPAMODE | OPAMP PGA mode 00 and 01: internal PGA disabled 2 (B_0x2): internal PGA enabled, gain programmed in PGA_GAIN 3 (B_0x3): internal follower |
| PGA_GAIN | OPAMP programmable amplifier gain value 0 (B_0x0): internal PGA gain 2 1 (B_0x1): internal PGA gain 4 2 (B_0x2): internal PGA gain 8 3 (B_0x3): internal PGA gain 16 |
| VM_SEL | Inverting input selection These bits are used only when OPAMODE = 00, 01 or 10. in PGA mode for filtering) 1x: inverting input not externally connected 0 (B_0x0): GPIO connected to VINM (valid also in PGA mode for filtering) 1 (B_0x1): dedicated low-leakage input connected to VINM (valid also |
| VP_SEL | Non inverted input selection 0 (B_0x0): GPIO connected to VINP 1 (B_0x1): DAC connected to VINP |
| CALON | Calibration mode enable 0 (B_0x0): normal mode 1 (B_0x1): calibration mode (all switches opened by hardware) |
| CALSEL | Calibration selection 0 (B_0x0): NMOS calibration (200 mV applied on OPAMP inputs) 1 (B_0x1): PMOS calibration (VDDA - 200 mV applied on OPAMP inputs) |
| USERTRIM | ‘factory’ or ‘user’ offset trimmed values selection This bit is active for normal and low-power modes. 0 (B_0x0): ‘factory’ trim code used 1 (B_0x1): ‘user’ trim code used |
| CALOUT | OPAMP calibration output During calibration mode, the offset is trimmed when this signal toggles. |
| OPAHSM | OPAMP high-speed mode This bit is effective for both normal and high-speed modes. 0 (B_0x0): normal mode (standard slew rate) 1 (B_0x1): increased consumption to improve the slew rate |