STMicroelectronics /STM32U535 /RCC /RCC_CCIPR3

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Interpret as RCC_CCIPR3

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)LPUART1SEL 0 (B_0x0)SPI3SEL 0 (B_0x0)I2C3SEL 0 (B_0x0)LPTIM34SEL 0 (B_0x0)LPTIM1SEL 0 (B_0x0)ADCDACSEL 0 (B_0x0)DAC1SEL 0 (B_0x0)ADF1SEL

LPTIM34SEL=B_0x0, SPI3SEL=B_0x0, ADCDACSEL=B_0x0, LPTIM1SEL=B_0x0, LPUART1SEL=B_0x0, I2C3SEL=B_0x0, ADF1SEL=B_0x0, DAC1SEL=B_0x0

Description

RCC peripherals independent clock configuration register 3

Fields

LPUART1SEL

LPUART1 kernel clock source selection These bits are used to select the LPUART1 kernel clock source. others: reserved Note: The LPUART1 is functional in Stop 0, Stop 1, and Stop 2 modes only when the kernel clock is HSI16, LSE, or MSIK.

0 (B_0x0): PCLK3 selected

1 (B_0x1): SYSCLK selected

2 (B_0x2): HSI16 selected

3 (B_0x3): LSE selected

4 (B_0x4): MSIK selected

SPI3SEL

SPI3 kernel clock source selection These bits are used to select the SPI3 kernel clock source. Note: The SPI3 is functional in Stop 0, Stop 1, and Stop 2 modes only when the kernel clock is HSI16 or MSIK.

0 (B_0x0): PCLK3 selected

1 (B_0x1): SYSCLK selected

2 (B_0x2): HSI16 selected

3 (B_0x3): MSIK selected

I2C3SEL

I2C3 kernel clock source selection These bits are used to select the I2C3 kernel clock source. Note: The I2C3 is functional in Stop 0, Stop 1, and Stop 2 modes only when the kernel clock is HSI16 or MSIK.

0 (B_0x0): PCLK3 selected

1 (B_0x1): SYSCLK selected

2 (B_0x2): HSI16 selected

3 (B_0x3): MSIK selected

LPTIM34SEL

LPTIM3 and LPTIM4 kernel clock source selection These bits are used to select the LPTIM3 and LPTIM4 kernel clock source. Note: The LPTIM3 and LPTIM4 are functional in Stop 0, Stop 1, and Stop 2 modes only when the kernel clock is LSI, LSE, HSI16 with HSIKERON = 1, or MSIK with MSIKERON�=�1.

0 (B_0x0): MSIK clock selected

1 (B_0x1): LSI selected

2 (B_0x2): HSI selected

3 (B_0x3): LSE selected

LPTIM1SEL

LPTIM1 kernel clock source selection These bits are used to select the LPTIM1 kernel clock source. Note: The LPTIM1 is functional in Stop 0, Stop 1, and Stop 2 modes only when the kernel clock is LSI, LSE, HSI16 with HSIKERON = 1, or MSIK with MSIKERON = 1.

0 (B_0x0): MSIK clock selected

1 (B_0x1): LSI selected

2 (B_0x2): HSI16 selected

3 (B_0x3): LSE selected

ADCDACSEL

ADC1, ADC2, ADC4 and DAC1 kernel clock source selection These bits are used to select the ADC1, ADC2, ADC4, and DAC1 kernel clock source. others: reserved Note: The ADC1, ADC2, ADC4, and DAC1 are functional in Stop 0, Stop 1, and Stop 2 modes only when the kernel clock is HSI16 or MSIK (only ADC4 and DAC1 are functional in�Stop 2 mode).

0 (B_0x0): HCLK clock selected

1 (B_0x1): SYSCLK selected

2 (B_0x2): PLL2 “R” (pll2_r_ck) selected

3 (B_0x3): HSE clock selected

4 (B_0x4): HSI16 clock selected

5 (B_0x5): MSIK clock selected

DAC1SEL

DAC1 sample-and-hold clock source selection This bit is used to select the DAC1 sample-and-hold clock source.

0 (B_0x0): LSE selected

1 (B_0x1): LSI selected

ADF1SEL

ADF1 kernel clock source selection These bits are used to select the ADF1 kernel clock source. others: reserved Note: The ADF1 is functional in Stop 0, Stop 1, and Stop 2 modes only when the kernel clock is AUDIOCLK or MSIK.

0 (B_0x0): HCLK selected

1 (B_0x1): PLL1 “P” (pll1_p_ck) selected

2 (B_0x2): PLL3 “Q” (pll3_q_ck) selected

3 (B_0x3): input pin AUDIOCLK selected

4 (B_0x4): MSIK clock selected

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