STMicroelectronics /STM32U545 /PWR /PWR_VOSR

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Interpret as PWR_VOSR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)USBBOOSTRDY 0 (B_0x0)BOOSTRDY 0 (B_0x0)VOSRDY 0 (B_0x0)VOS0 (B_0x0)BOOSTEN 0 (B_0x0)USBPWREN 0 (B_0x0)USBBOOSTEN

VOSRDY=B_0x0, BOOSTRDY=B_0x0, USBBOOSTRDY=B_0x0, BOOSTEN=B_0x0, USBPWREN=B_0x0, VOS=B_0x0, USBBOOSTEN=B_0x0

Description

PWR voltage scaling register

Fields

USBBOOSTRDY

USB EPOD booster ready This bit is set to 1 by hardware when the power booster startup time is reached. The USB clock can be provided only after this bit is set. Note: This bit is only available in STM32U59x/5Ax. It is reserved in STM32U575/585.

0 (B_0x0): USB power booster not ready

1 (B_0x1): USB power booster ready

BOOSTRDY

EPOD booster ready This bit is set to 1 by hardware when the power booster startup time is reached. The system clock frequency can be switched higher than 50 MHz only after this bit is set.

0 (B_0x0): Power booster not ready

1 (B_0x1): Power booster ready

VOSRDY

Ready bit for VCORE voltage scaling output selection

0 (B_0x0): Not ready, voltage level < VOS selected level

1 (B_0x1): Ready, voltage level ≥ VOS selected level

VOS

Voltage scaling range selection This field is protected against non-secure access when SYSCLKSEC = 1 in RCC_SECCFGR. It is protected against unprivileged access when SYSCLKSEC = 1 in RCC_SECCFGR and SPRIV = 1 in PWR_PRIVCFGR, or when SYSCLKSEC = 0 and NSPRIV = 1.

0 (B_0x0): Range 4 (lowest power)

1 (B_0x1): Range 3

2 (B_0x2): Range 2

3 (B_0x3): Range 1 (highest frequency). This value cannot be written when VCOREMEN = 1 in TAMP_OR register.

BOOSTEN

EPOD booster enable This bit is protected against non-secure access when SYSCLKSEC = 1 in RCC_SECCFGR. It is protected against unprivileged access when SYSCLKSEC = 1 in RCC_SECCFGR and SPRIV = 1 in PWR_PRIVCFGR, or when SYSCLKSEC = 0 and NSPRIV = 1. This bit must be set in range 1 and range 2 before increasing the system clock frequency above 50 MHz. This bit is reset when going into Stop modes (0, 1, 2, 3).

0 (B_0x0): Booster disabled

1 (B_0x1): Booster enabled

USBPWREN

USB power enable This bit is protected against non-secure access when SYSCLKSEC = 1 in RCC_SECCFGR. It is protected against unprivileged access when SYSCLKSEC = 1 in RCC_SECCFGR and SPRIV = 1 in PWR_PRIVCFGR, or when SYSCLKSEC = 0 and NSPRIV = 1. Note: This bit is only available in STM32U59x/5Ax. It is reserved in STM32U575/585.

0 (B_0x0): USB power disabled

1 (B_0x1): USB power enabled

USBBOOSTEN

USB EPOD booster enable This bit is protected against non-secure access when SYSCLKSEC = 1 in RCC_SECCFGR. It is protected against unprivileged access when SYSCLKSEC = 1 in RCC_SECCFGR and SPRIV = 1 in PWR_PRIVCFGR, or when SYSCLKSEC = 0 and NSPRIV = 1. This bit must be set in range 1 and range 2 before enabling the USB peripheral. This bit is reset when going into Stop modes (0, 1, 2, 3). Note: This bit is only available in STM32U59x/5Ax. It is reserved in STM32U575/585.

0 (B_0x0): USB booster disabled

1 (B_0x1): USB booster enabled

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