Cut and paste this URL to share the unmodified register and value:
https://regviz.com/r/STMicroelectronics/STM32U575/LPDMA1/LPDMA_MISR#0x0
LPDMA non-secure masked interrupt status register
MIS0
MIS1
MIS2
MIS3
https://github.com/cmsis-svd/cmsis-svd-data