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STMicroelectronics /STM32U585 /PWR /PWR_SVMCR

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Interpret as PWR_SVMCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)PVDE 0 (B_0x0)PVDLS0 (B_0x0)UVMEN 0 (B_0x0)IO2VMEN 0 (B_0x0)AVM1EN 0 (B_0x0)AVM2EN 0 (B_0x0)USV 0 (B_0x0)IO2SV 0 (B_0x0)ASV

USV=B_0x0, UVMEN=B_0x0, AVM2EN=B_0x0, AVM1EN=B_0x0, IO2VMEN=B_0x0, ASV=B_0x0, PVDLS=B_0x0, IO2SV=B_0x0, PVDE=B_0x0

Description

PWR supply voltage monitoring control register

Fields

PVDE

Power voltage detector enable

0 (B_0x0): Power voltage detector disabled

1 (B_0x1): Power voltage detector enabled
PVDLS

Power voltage detector level selection These bits select the voltage threshold detected by the power voltage detector:

0 (B_0x0): VPVD0 around 2.0 V

1 (B_0x1): VPVD1 around 2.2 V

2 (B_0x2): VPVD2 around 2.4 V

3 (B_0x3): VPVD3 around 2.5 V

4 (B_0x4): VPVD4 around 2.6 V

5 (B_0x5): VPVD5 around 2.8 V

6 (B_0x6): VPVD6 around 2.9 V

7 (B_0x7): External input analog voltage PVD_IN (compared internally to VREFINT)
UVMEN

VDDUSB independent USB voltage monitor enable

0 (B_0x0): VDDUSB voltage monitor disabled

1 (B_0x1): VDDUSB voltage monitor enabled
IO2VMEN

VDDIO2 independent I/Os voltage monitor enable

0 (B_0x0): VDDIO2 voltage monitor disabled

1 (B_0x1): VDDIO2 voltage monitor enabled
AVM1EN

VDDA independent analog supply voltage monitor 1 enable (1.6 V threshold)

0 (B_0x0): VDDA voltage monitor 1 disabled

1 (B_0x1): VDDA voltage monitor 1 enabled
AVM2EN

VDDA independent analog supply voltage monitor 2 enable (1.8 V threshold)

0 (B_0x0): VDDA voltage monitor 2 disabled

1 (B_0x1): VDDA voltage monitor 2 enabled
USV

VDDUSB independent USB supply valid

0 (B_0x0): VDDUSB not present: logical and electrical isolation is applied to ignore this supply.

1 (B_0x1): VDDUSB valid
IO2SV

VDDIO2 independent I/Os supply valid This bit is used to validate the VDDIO2 supply for electrical and logical isolation purpose. Setting this bit is mandatory to use PG[15:2]. If VDDIO2 is not always present in the application, the VDDIO2 voltage monitor can be used to determine whether this supply is ready or not.

0 (B_0x0): VDDIO2 not present: logical and electrical isolation is applied to ignore this supply.

1 (B_0x1): VDDIO2 valid
ASV

VDDA independent analog supply valid

0 (B_0x0): VDDA not present: logical and electrical isolation is applied to ignore this supply.

1 (B_0x1): VDDA valid

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data