Regviz

STMicroelectronics /STM32U595 /DCMI /MIS

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as MIS

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/STMicroelectronics/STM32U599/DCMI/MIS#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (FRAME_MIS)FRAME_MIS 0 (OVR_MIS)OVR_MIS 0 (ERR_MIS)ERR_MIS 0 (VSYNC_MIS)VSYNC_MIS 0 (LINE_MIS)LINE_MIS

Description

masked interrupt status register

Fields

FRAME_MIS

Capture complete masked interrupt status
OVR_MIS

Overrun masked interrupt status
ERR_MIS

Synchronization error masked interrupt status
VSYNC_MIS

VSYNC masked interrupt status
LINE_MIS

Line masked interrupt status

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data