SRAM/NOR-Flash chip-select control register for bank 3
| MBKEN | Memory bank enable bit |
| MUXEN | Address/data multiplexing enable bit |
| MTYP | Memory type |
| MWID | Memory data bus width |
| FACCEN | Flash access enable |
| BURSTEN | Burst enable bit |
| WAITPOL | Wait signal polarity bit |
| WAITCFG | Wait timing configuration |
| WREN | Write enable bit |
| WAITEN | Wait enable bit |
| EXTMOD | Extended mode enable |
| ASYNCWAIT | Wait signal during asynchronous transfers |
| CPSIZE | CRAM Page Size |
| CBURSTRW | Write burst enable |
| CCLKEN | Continuous clock enable |
| WFDIS | Write FIFO disable |
| NBLSET | Byte lane (NBL) setup |
| FMCEN | FMC controller enable |