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STMicroelectronics /STM32U595 /TIM2 /CR2

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Interpret as CR2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CCDS)CCDS 0MMS0 (TI1S)TI1S 0 (MMS_3)MMS_3

Description

control register 2

Fields

CCDS

Capture/compare DMA selection
MMS

Master mode selection
TI1S

TI1 selection
MMS_3

Master mode selection

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data