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STMicroelectronics /STM32U5A5 /DBGMCU /AHB1FZR

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Interpret as AHB1FZR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DBG_GPDMA0_STOP)DBG_GPDMA0_STOP 0 (DBG_GPDMA1_STOP)DBG_GPDMA1_STOP 0 (DBG_GPDMA2_STOP)DBG_GPDMA2_STOP 0 (DBG_GPDMA3_STOP)DBG_GPDMA3_STOP 0 (DBG_GPDMA4_STOP)DBG_GPDMA4_STOP 0 (DBG_GPDMA5_STOP)DBG_GPDMA5_STOP 0 (DBG_GPDMA6_STOP)DBG_GPDMA6_STOP 0 (DBG_GPDMA7_STOP)DBG_GPDMA7_STOP 0 (DBG_GPDMA8_STOP)DBG_GPDMA8_STOP 0 (DBG_GPDMA9_STOP)DBG_GPDMA9_STOP 0 (DBG_GPDMA10_STOP)DBG_GPDMA10_STOP 0 (DBG_GPDMA11_STOP)DBG_GPDMA11_STOP 0 (DBG_GPDMA12_STOP)DBG_GPDMA12_STOP 0 (DBG_GPDMA13_STOP)DBG_GPDMA13_STOP 0 (DBG_GPDMA14_STOP)DBG_GPDMA14_STOP 0 (DBG_GPDMA15_STOP)DBG_GPDMA15_STOP

Description

Debug MCU AHB1 peripheral freeze register

Fields

DBG_GPDMA0_STOP

GPDMA channel 0 stop in debug
DBG_GPDMA1_STOP

GPDMA channel 1 stop in debug
DBG_GPDMA2_STOP

GPDMA channel 2 stop in debug
DBG_GPDMA3_STOP

GPDMA channel 3 stop in debug
DBG_GPDMA4_STOP

GPDMA channel 4 stop in debug
DBG_GPDMA5_STOP

GPDMA channel 5 stop in debug
DBG_GPDMA6_STOP

GPDMA channel 6 stop in debug
DBG_GPDMA7_STOP

GPDMA channel 7 stop in debug
DBG_GPDMA8_STOP

GPDMA channel 8 stop in debug
DBG_GPDMA9_STOP

GPDMA channel 9 stop in debug
DBG_GPDMA10_STOP

GPDMA channel 10 stop in debug
DBG_GPDMA11_STOP

GPDMA channel 11 stop in debug
DBG_GPDMA12_STOP

GPDMA channel 12 stop in debug
DBG_GPDMA13_STOP

GPDMA channel 13 stop in debug
DBG_GPDMA14_STOP

GPDMA channel 14 stop in debug
DBG_GPDMA15_STOP

GPDMA channel 15 stop in debug

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data