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STMicroelectronics /STM32U5A5 /FMAC /SR

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Interpret as SR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (YEMPTY)YEMPTY 0 (X1FULL)X1FULL 0 (OVFL)OVFL 0 (UNFL)UNFL 0 (SAT)SAT

Description

FMAC Status register

Fields

YEMPTY

Y buffer empty flag
X1FULL

X1 buffer full flag
OVFL

Overflow error flag
UNFL

Underflow error flag
SAT

Saturation error flag

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data