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STMicroelectronics /STM32U5A5 /GTZC2_TZIC /SR2

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Interpret as SR2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SYSCFGF)SYSCFGF 0 (RTCF)RTCF 0 (TAMPF)TAMPF 0 (PWRF)PWRF 0 (RCCF)RCCF 0 (LPDMA1F)LPDMA1F 0 (EXTIF)EXTIF 0 (TZSC2F)TZSC2F 0 (TZIC2F)TZIC2F 0 (SRAM4F)SRAM4F 0 (MPCBB4_REGF)MPCBB4_REGF

Description

TZIC status register 2

Fields

SYSCFGF

illegal access flag for SYSCFG
RTCF

illegal access flag for RTC
TAMPF

illegal access flag for TAMP
PWRF

illegal access flag for PWRUSART1F
RCCF

illegal access flag for RCC
LPDMA1F

illegal access flag for LPDMA
EXTIF

illegal access flag for EXTI
TZSC2F

illegal access flag for GTZC2 TZSC registers
TZIC2F

illegal access flag for GTZC2 TZIC registers
SRAM4F

illegal access flag for SRAM4
MPCBB4_REGF

illegal access flag for MPCBB4 registers

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data