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STMicroelectronics /STM32U5A5 /OCTOSPI1 /WPTCR

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Interpret as WPTCR

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31282724232019161512118743000000000000000000000000000000000000000000DCYC0 (DHQC)DHQC0 (SSHIFT)SSHIFT

Description

wrap timing configuration register

Fields

DCYC

Number of dummy cycles
DHQC

Delay hold quarter cycle
SSHIFT

Sample shift

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data