PSEIE=B_0x0, CRCEIE=B_0x0, GPWREIE=B_0x0, ECCSEIE=B_0x0, TOLPRXIE=B_0x0, GPRXEIE=B_0x0, ECCMEIE=B_0x0, TOHSTXIE=B_0x0, PBUEIE=B_0x0, LPWREIE=B_0x0, GPTXEIE=B_0x0, GCWREIE=B_0x0, EOTPEIE=B_0x0, GPRDEIE=B_0x0
DSI Host interrupt enable register 1
| TOHSTXIE | Timeout high-speed transmission interrupt enable This bit enables the interrupt generation on timeout high-speed transmission . 0 (B_0x0): Interrupt on timeout high-speed transmission disabled 1 (B_0x1): Interrupt on timeout high-speed transmission enabled |
| TOLPRXIE | Timeout low-power reception interrupt enable This bit enables the interrupt generation on timeout low-power reception. 0 (B_0x0): Interrupt on timeout low-power reception disabled 1 (B_0x1): Interrupt on timeout low-power reception enabled |
| ECCSEIE | ECC single-bit error interrupt enable This bit enables the interrupt generation on ECC single-bit error. 0 (B_0x0): Interrupt on ECC single-bit error disabled 1 (B_0x1): Interrupt on ECC single-bit error enabled |
| ECCMEIE | ECC multi-bit error interrupt enable This bit enables the interrupt generation on ECC multi-bit error. 0 (B_0x0): Interrupt on ECC multi-bit error disabled 1 (B_0x1): Interrupt on ECC multi-bit error enabled |
| CRCEIE | CRC error interrupt enable This bit enables the interrupt generation on CRC error. 0 (B_0x0): Interrupt on CRC error disabled 1 (B_0x1): Interrupt on CRC error enabled |
| PSEIE | Packet size error interrupt enable This bit enables the interrupt generation on packet size error. 0 (B_0x0): Interrupt on packet size error disabled 1 (B_0x1): Interrupt on packet size error enabled |
| EOTPEIE | EoTp error interrupt enable This bit enables the interrupt generation on EoTp error. 0 (B_0x0): Interrupt on EoTp error disabled 1 (B_0x1): Interrupt on EoTp error enabled |
| LPWREIE | LTDC payload write error interrupt enable This bit enables the interrupt generation on LTDC payload write error. 0 (B_0x0): Interrupt on LTDC payload write error disabled 1 (B_0x1): Interrupt on LTDC payload write error enabled |
| GCWREIE | Generic command write error interrupt enable This bit enables the interrupt generation on generic command write error. 0 (B_0x0): Interrupt on generic command write error disabled 1 (B_0x1): Interrupt on generic command write error enabled |
| GPWREIE | Generic payload write error interrupt enable This bit enables the interrupt generation on generic payload write error. 0 (B_0x0): Interrupt on generic payload write error disabled 1 (B_0x1): Interrupt on generic payload write error enabled |
| GPTXEIE | Generic payload transmit error interrupt enable This bit enables the interrupt generation on generic payload transmit error. 0 (B_0x0): Interrupt on generic payload transmit error disabled 1 (B_0x1): Interrupt on generic payload transmit error enabled |
| GPRDEIE | Generic payload read error interrupt enable This bit enables the interrupt generation on generic payload read error. 0 (B_0x0): Interrupt on generic payload read error disabled 1 (B_0x1): Interrupt on generic payload read error enabled |
| GPRXEIE | Generic payload receive error interrupt enable This bit enables the interrupt generation on generic payload receive error. 0 (B_0x0): Interrupt on generic payload receive error disabled 1 (B_0x1): Interrupt on generic payload receive error enabled |
| PBUEIE | Payload buffer underflow error interrupt enable This bit enables the interrupt generation on payload buffer underflow error. 0 (B_0x0): Interrupt on payload buffer underflow error disabled 1 (B_0x1): Interrupt on payload buffer underflow error enabled |