STMicroelectronics /STM32U5A9 /DSI /DSI_VLCR

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Interpret as DSI_VLCR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0HLINE

Description

DSI Host video line configuration register

Fields

HLINE

Horizontal line duration This fields configures the total of the horizontal line period (HSA+HBP+HACT+HFP) counted in lane byte clock cycles.

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