WRAPSIZE=B_0x0, PRESCALER=B_0x0
HSPI device configuration register 2
| PRESCALER | Clock prescaler This field defines the scaler factor for generating the CLK based on the kernel clock (value + 1). 2: FCLK = FKERNEL/3 … 255: FCLK = FKERNEL/256 For odd clock division factors, the CLK duty cycle is not 50 %. The clock signal remains low one cycle longer than it stays high. Writing this field automatically starts a new calibration of high-speed interface DLL at the start of next transfer, except in case HSPI_CALOSR or HSPI_CALISR have been written in the meantime. BUSY stays high during the whole calibration execution. 0 (B_0x0): FCLK = FKERNEL, kernel clock used directly as HSPICLK (prescaler bypassed). In this case, if the DDR mode is used, it is mandatory to provide to the HSPI a kernel clock that has 50% duty-cycle. 1 (B_0x1): FCLK = FKERNEL/2 |
| WRAPSIZE | Wrap size This field indicates the wrap size to which the memory is configured. For memories which have a separate command for wrapped instructions, this field indicates the wrap-size associated with the command held in the HSPI_WPIR register. 110-111: Reserved 0 (B_0x0): Wrapped reads are not supported by the memory. 2 (B_0x2): External memory supports wrap size of 16 bytes. 3 (B_0x3): External memory supports wrap size of 32 bytes. 4 (B_0x4): External memory supports wrap size of 64 bytes. 5 (B_0x5): External memory supports wrap size of 128 bytes. |