STMicroelectronics /STM32U5A9 /RCC /RCC_APB3RSTR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as RCC_APB3RSTR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)SYSCFGRST 0 (B_0x0)SPI3RST 0 (B_0x0)LPUART1RST 0 (B_0x0)I2C3RST 0 (B_0x0)LPTIM1RST 0 (B_0x0)LPTIM3RST 0 (B_0x0)LPTIM4RST 0 (B_0x0)OPAMPRST 0 (B_0x0)COMPRST 0 (B_0x0)VREFRST

LPTIM4RST=B_0x0, VREFRST=B_0x0, OPAMPRST=B_0x0, LPTIM3RST=B_0x0, COMPRST=B_0x0, LPUART1RST=B_0x0, SYSCFGRST=B_0x0, LPTIM1RST=B_0x0, I2C3RST=B_0x0, SPI3RST=B_0x0

Description

RCC APB3 peripheral reset register

Fields

SYSCFGRST

SYSCFG reset This bit is set and cleared by software.

0 (B_0x0): No effect

1 (B_0x1): Reset the SYSCFG.

SPI3RST

SPI3 reset This bit is set and cleared by software.

0 (B_0x0): No effect

1 (B_0x1): Reset the SPI3.

LPUART1RST

LPUART1 reset This bit is set and cleared by software.

0 (B_0x0): No effect

1 (B_0x1): Reset the LPUART1.

I2C3RST

I2C3 reset This bit is set and cleared by software.

0 (B_0x0): No effect

1 (B_0x1): Reset the I2C3.

LPTIM1RST

LPTIM1 reset This bit is set and cleared by software.

0 (B_0x0): No effect

1 (B_0x1): Reset the LPTIM1.

LPTIM3RST

LPTIM3 reset This bit is set and cleared by software.

0 (B_0x0): No effect

1 (B_0x1): Reset the LPTIM3.

LPTIM4RST

LPTIM4 reset This bit is set and cleared by software.

0 (B_0x0): No effect

1 (B_0x1): Reset the LPTIM4.

OPAMPRST

OPAMP reset This bit is set and cleared by software.

0 (B_0x0): No effect

1 (B_0x1): Reset the OPAMP.

COMPRST

COMP reset This bit is set and cleared by software.

0 (B_0x0): No effect

1 (B_0x1): Reset the COMP.

VREFRST

VREFBUF reset This bit is set and cleared by software.

0 (B_0x0): No effect

1 (B_0x1): Reset the VREFBUF.

Links

()