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STMicroelectronics /STM32U5A9 /RCC /RCC_ICSCR3

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Interpret as RCC_ICSCR3

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0HSICAL0HSITRIM

Description

RCC internal clock sources calibration register 3

Fields

HSICAL

HSI clock calibration These bits are initialized at startup with the factory-programmed HSI calibration trim value. When HSITRIM is written, HSICAL is updated with the sum of HSITRIM and the factory trim value.
HSITRIM

HSI clock trimming These bits provide an additional user-programmable trimming value that is added to HSICAL[11:0] bits. It can be programmed to adjust to voltage and temperature variations that influence the frequency of the HSI.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data