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STMicroelectronics /STM32U5Fx /DSI /DSI_CMCR

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Interpret as DSI_CMCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)TEARE 0 (B_0x0)ARE 0 (B_0x0)GSW0TX 0 (B_0x0)GSW1TX 0 (B_0x0)GSW2TX 0 (B_0x0)GSR0TX 0 (B_0x0)GSR1TX 0 (B_0x0)GSR2TX 0 (B_0x0)GLWTX 0 (B_0x0)DSW0TX 0 (B_0x0)DSW1TX 0 (B_0x0)DSR0TX 0 (B_0x0)DLWTX 0 (B_0x0)MRDPS

MRDPS=B_0x0, DSW1TX=B_0x0, GSW2TX=B_0x0, DLWTX=B_0x0, GSW0TX=B_0x0, ARE=B_0x0, DSW0TX=B_0x0, GLWTX=B_0x0, GSR1TX=B_0x0, GSW1TX=B_0x0, DSR0TX=B_0x0, GSR2TX=B_0x0, GSR0TX=B_0x0, TEARE=B_0x0

Description

DSI Host command mode configuration register

Fields

TEARE

Tearing effect acknowledge request enable This bit enables the tearing effect acknowledge request:

0 (B_0x0): Tearing effect acknowledge request is disabled.

1 (B_0x1): Tearing effect acknowledge request is enabled.
ARE

Acknowledge request enable This bit enables the acknowledge request after each packet transmission:

0 (B_0x0): Acknowledge request is disabled.

1 (B_0x1): Acknowledge request is enabled.
GSW0TX

Generic short write zero parameters transmission This bit configures the generic short write packet with zero parameters command transmission type:

0 (B_0x0): High-speed

1 (B_0x1): Low-power
GSW1TX

Generic short write one parameters transmission This bit configures the generic short write packet with one parameters command transmission type:

0 (B_0x0): High-speed

1 (B_0x1): Low-power
GSW2TX

Generic short write two parameters transmission This bit configures the generic short write packet with two parameters command transmission type:

0 (B_0x0): High-speed

1 (B_0x1): Low-power
GSR0TX

Generic short read zero parameters transmission This bit configures the generic short read packet with zero parameters command transmission type:

0 (B_0x0): High-speed

1 (B_0x1): Low-power
GSR1TX

Generic short read one parameters transmission This bit configures the generic short read packet with one parameters command transmission type:

0 (B_0x0): High-speed

1 (B_0x1): Low-power
GSR2TX

Generic short read two parameters transmission This bit configures the generic short read packet with two parameters command transmission type:

0 (B_0x0): High-speed

1 (B_0x1): Low-power
GLWTX

Generic long write transmission This bit configures the generic long write packet command transmission type :

0 (B_0x0): High-speed

1 (B_0x1): Low-power
DSW0TX

DCS short write zero parameter transmission This bit configures the DCS short write packet with zero parameter command transmission type:

0 (B_0x0): High-speed

1 (B_0x1): Low-power
DSW1TX

DCS short read one parameter transmission This bit configures the DCS short read packet with one parameter command transmission type:

0 (B_0x0): High-speed

1 (B_0x1): Low-power
DSR0TX

DCS short read zero parameter transmission This bit configures the DCS short read packet with zero parameter command transmission type:

0 (B_0x0): High-speed

1 (B_0x1): Low-power
DLWTX

DCS long write transmission This bit configures the DCS long write packet command transmission type:

0 (B_0x0): High-speed

1 (B_0x1): Low-power
MRDPS

Maximum read packet size This bit configures the maximum read packet size command transmission type:

0 (B_0x0): High-speed

1 (B_0x1): Low-power

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data