STMicroelectronics /STM32U5Fx /I2C1 /CR1

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Interpret as CR1

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PE)PE 0 (TXIE)TXIE 0 (RXIE)RXIE 0 (ADDRIE)ADDRIE 0 (NACKIE)NACKIE 0 (STOPIE)STOPIE 0 (TCIE)TCIE 0 (ERRIE)ERRIE 0DNF0 (ANFOFF)ANFOFF 0 (TXDMAEN)TXDMAEN 0 (RXDMAEN)RXDMAEN 0 (SBC)SBC 0 (NOSTRETCH)NOSTRETCH 0 (WUPEN)WUPEN 0 (GCEN)GCEN 0 (SMBHEN)SMBHEN 0 (SMBDEN)SMBDEN 0 (ALERTEN)ALERTEN 0 (PECEN)PECEN 0 (FMP)FMP 0 (ADDRACLR)ADDRACLR 0 (STOPFACLR)STOPFACLR

Description

Control register 1

Fields

PE

Peripheral enable

TXIE

TX Interrupt enable

RXIE

RX Interrupt enable

ADDRIE

Address match interrupt enable (slave only)

NACKIE

Not acknowledge received interrupt enable

STOPIE

STOP detection Interrupt enable

TCIE

Transfer Complete interrupt enable

ERRIE

Error interrupts enable

DNF

Digital noise filter

ANFOFF

Analog noise filter OFF

TXDMAEN

DMA transmission requests enable

RXDMAEN

DMA reception requests enable

SBC

Slave byte control

NOSTRETCH

Clock stretching disable

WUPEN

Wakeup from STOP enable

GCEN

General call enable

SMBHEN

SMBus Host address enable

SMBDEN

SMBus Device Default address enable

ALERTEN

SMBUS alert enable

PECEN

PEC enable

FMP

Fast-mode Plus 20 mA drive enable

ADDRACLR

Address match flag (ADDR) automatic clear

STOPFACLR

STOP detection flag (STOPF) automatic clear

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