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STMicroelectronics /STM32U5Fx /LTDC /LTDC_ICR

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Interpret as LTDC_ICR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)CLIF 0 (B_0x0)CFUIF 0 (B_0x0)CTERRIF 0 (B_0x0)CRRIF

CFUIF=B_0x0, CRRIF=B_0x0, CLIF=B_0x0, CTERRIF=B_0x0

Fields

CLIF

clears the line interrupt flag

0 (B_0x0): no effect

1 (B_0x1): clears the LIF flag in the LTDC_ISR register.
CFUIF

clears the FIFO underrun interrupt flag

0 (B_0x0): no effect

1 (B_0x1): clears the FUDERRIF flag in the LTDC_ISR register.
CTERRIF

clears the transfer error interrupt flag

0 (B_0x0): no effect

1 (B_0x1): clears the TERRIF flag in the LTDC_ISR register.
CRRIF

clears register reload interrupt flag

0 (B_0x0): no effect

1 (B_0x1): clears the RRIF flag in the LTDC_ISR register

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data