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STMicroelectronics /STM32U5Fx /OTG_HS /GLPMCFG

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Interpret as GLPMCFG

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (LPMEN)LPMEN 0 (LPMACK)LPMACK 0BESL0 (REMWAKE)REMWAKE 0 (L1SSEN)L1SSEN 0BESLTHRS 0 (L1DSEN)L1DSEN 0LPMRSP 0 (SLPSTS)SLPSTS 0 (L1RSMOK)L1RSMOK 0LPMCHIDX 0LPMRCNT 0 (SNDLPM)SNDLPM 0LPMRCNTSTS 0 (ENBESL)ENBESL

Description

OTG core LPM configuration register

Fields

LPMEN

LPMEN
LPMACK

LPMACK
BESL

BESL
REMWAKE

REMWAKE
L1SSEN

L1SSEN
BESLTHRS

BESLTHRS
L1DSEN

L1DSEN
LPMRSP

LPMRSP
SLPSTS

SLPSTS
L1RSMOK

L1RSMOK
LPMCHIDX

LPMCHIDX
LPMRCNT

LPMRCNT
SNDLPM

SNDLPM
LPMRCNTSTS

LPMRCNTSTS
ENBESL

ENBESL

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data