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STMicroelectronics /STM32U5Fx /PWR /PWR_PDCRA

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Interpret as PWR_PDCRA

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PD0)PD0 0 (PD1)PD1 0 (PD2)PD2 0 (PD3)PD3 0 (PD4)PD4 0 (PD5)PD5 0 (PD6)PD6 0 (PD7)PD7 0 (PD8)PD8 0 (PD9)PD9 0 (PD10)PD10 0 (PD11)PD11 0 (PD12)PD12 0 (PD14)PD14

Description

PWR port A pull-down control register

Fields

PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PD8
PD9
PD10
PD11
PD12
PD14

Port A pull-down bit 14 When set, this bit activates the pull-down on PA14 when the APC bit is set in PWR_APCR.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data