SYSCFGSMEN=B_0x0, VREFSMEN=B_0x0, SPI3SMEN=B_0x0, LPTIM1SMEN=B_0x0, LPTIM4SMEN=B_0x0, COMPSMEN=B_0x0, RTCAPBSMEN=B_0x0, LPTIM3SMEN=B_0x0, LPUART1SMEN=B_0x0, I2C3SMEN=B_0x0, OPAMPSMEN=B_0x0
RCC APB3 peripheral clock enable in Sleep and Stop modes register
| SYSCFGSMEN | SYSCFG clock enable during Sleep and Stop modes This bit is set and cleared by software. 0 (B_0x0): SYSCFG clocks disabled by the clock gating during Sleep and Stop modes 1 (B_0x1): SYSCFG clocks enabled by the clock gating during Sleep and Stop modes |
| SPI3SMEN | SPI3 clock enable during Sleep and Stop modes This bit is set and cleared by software. Note: This bit must be set to allow the peripheral to wake up from Stop modes. 0 (B_0x0): SPI3 clocks disabled by the clock gating during Sleep and Stop modes 1 (B_0x1): SPI3 clocks enabled by the clock gating during Sleep and Stop modes |
| LPUART1SMEN | LPUART1 clock enable during Sleep and Stop modes This bit is set and cleared by software. Note: This bit must be set to allow the peripheral to wake up from Stop modes. 0 (B_0x0): LPUART1 clocks disabled by the clock gating during Sleep and Stop modes 1 (B_0x1): LPUART1 clocks enabled by the clock gating during Sleep and Stop modes |
| I2C3SMEN | I2C3 clock enable during Sleep and Stop modes This bit is set and cleared by software. Note: This bit must be set to allow the peripheral to wake up from Stop modes. 0 (B_0x0): I2C3 clocks disabled by the clock gating during Sleep and Stop modes 1 (B_0x1): I2C3 clocks enabled by the clock gating during Sleep and Stop modes |
| LPTIM1SMEN | LPTIM1 clock enable during Sleep and Stop modes This bit is set and cleared by software. Note: This bit must be set to allow the peripheral to wake up from Stop modes. 0 (B_0x0): LPTIM1 clocks disabled by the clock gating during Sleep and Stop modes 1 (B_0x1): LPTIM1 clocks enabled by the clock gating during Sleep and Stop modes |
| LPTIM3SMEN | LPTIM3 clock enable during Sleep and Stop modes This bit is set and cleared by software. Note: This bit must be set to allow the peripheral to wake up from Stop modes. 0 (B_0x0): LPTIM3 clocks disabled by the clock gating during Sleep and Stop modes 1 (B_0x1): LPTIM3 clocks enabled by the clock gating during Sleep and Stop modes |
| LPTIM4SMEN | LPTIM4 clock enable during Sleep and Stop modes This bit is set and cleared by software. Note: This bit must be set to allow the peripheral to wake up from Stop modes. 0 (B_0x0): LPTIM4 clocks disabled by the clock gating during Sleep and Stop modes 1 (B_0x1): LPTIM4 clocks enabled by the clock gating during Sleep and Stop modes |
| OPAMPSMEN | OPAMP clock enable during Sleep and Stop modes This bit is set and cleared by software. 0 (B_0x0): OPAMP clocks disabled by the clock gating during Sleep and Stop modes 1 (B_0x1): OPAMP clocks enabled by the clock gating during Sleep and Stop modes |
| COMPSMEN | COMP clock enable during Sleep and Stop modes This bit is set and cleared by software. 0 (B_0x0): COMP clocks disabled by the clock gating during Sleep and Stop modes 1 (B_0x1): COMP clocks enabled by the clock gating during Sleep and Stop modes |
| VREFSMEN | VREFBUF clock enable during Sleep and Stop modes This bit is set and cleared by software. 0 (B_0x0): VREFBUF clocks disabled by the clock gating during Sleep and Stop modes 1 (B_0x1): VREFBUF clocks enabled by the clock gating during Sleep and Stop modes |
| RTCAPBSMEN | RTC and TAMP APB clock enable during Sleep and Stop modes This bit is set and cleared by software. Note: This bit must be set to allow the peripheral to wake up from Stop modes. 0 (B_0x0): RTC and TAMP APB clock disabled by the clock gating during Sleep and Stop modes 1 (B_0x1): RTC and TAMP APB clock enabled by the clock gating during Sleep and Stop modes |