MSIRGSEL=B_0x0, MSIBIAS=B_0x0, MSISRANGE=B_0x0, MSIKRANGE=B_0x0
RCC internal clock sources calibration register 1
| MSICAL3 | MSIRC3 clock calibration for MSI ranges 12 to 15 These bits are initialized at startup with the factory-programmed MSIRC3 calibration trim value for ranges 12 to 15. When MSITRIM3 is written, MSICAL3 is updated with the sum of MSITRIM3[4:0] and the factory calibration trim value MSIRC2[4:0]. There is no hardware protection to limit a potential overflow due to the addition of MSITRIM bitfield and factory program bitfield for this calibration value. Control must be managed by software at user level. |
| MSICAL2 | MSIRC2 clock calibration for MSI ranges 8 to 11 These bits are initialized at startup with the factory-programmed MSIRC2 calibration trim value for ranges 8 to 11. When MSITRIM2 is written, MSICAL2 is updated with the sum of MSITRIM2[4:0] and the factory calibration trim value MSIRC2[4:0]. There is no hardware protection to limit a potential overflow due to the addition of MSITRIM bitfield and factory program bitfield for this calibration value. Control must be managed by software at user level. |
| MSICAL1 | MSIRC1 clock calibration for MSI ranges 4 to 7 These bits are initialized at startup with the factory-programmed MSIRC1 calibration trim value for ranges 4 to 7. When MSITRIM1 is written, MSICAL1 is updated with the sum of MSITRIM1[4:0] and the factory calibration trim value MSIRC1[4:0]. There is no hardware protection to limit a potential overflow due to the addition of MSITRIM bitfield and factory program bitfield for this calibration value. Control must be managed by software at user level. |
| MSICAL0 | MSIRC0 clock calibration for MSI ranges 0 to 3 These bits are initialized at startup with the factory-programmed MSIRC0 calibration trim value for ranges 0 to 3. When MSITRIM0 is written, MSICAL0 is updated with the sum of MSITRIM0[4:0] and the factory-programmed calibration trim value MSIRC0[4:0]. There is no hardware protection to limit a potential overflow due to the addition of MSITRIM bitfield and factory program bitfield for this calibration value. Control must be managed by software at user level. |
| MSIBIAS | MSI bias mode selection This bit is set by software to select the MSI bias mode. By default, the MSI bias is in�continuous mode in order to maintain the output clocks accuracy. Setting this bit reduces the MSI consumption when the regulator is in range 4, or when the device is in Stop 1 or Stop�2 mode, but it�decreases the MSI accuracy 0 (B_0x0): MSI bias continuous mode (clock accuracy fast settling time) 1 (B_0x1): MSI bias sampling mode when the regulator is in range 4, or when the device is in�Stop�1�or Stop 2 (ultra-low-power mode) |
| MSIRGSEL | MSI clock range selection This bit is set by software to select the MSIS and MSIK clocks range with MSISRANGE[3:0] and MSIKRANGE[3:0]. Write 0 has no effect. After exiting Standby or Shutdown mode, or after a reset, this bit is at 0 and the MSIS and MSIK ranges are provided by MSISSRANGE[3:0] and MSIKSRANGE[3:0] in RCC_CSR. 0 (B_0x0): MSIS/MSIK ranges provided by MSISSRANGE[3:0] and MSIKSRANGE[3:0] in RCC_CSR 1 (B_0x1): MSIS/MSIK ranges provided by MSISRANGE[3:0] and MSIKRANGE[3:0] in�RCC_ICSCR1 |
| MSIKRANGE | MSIK clock ranges These bits are configured by software to choose the frequency range of MSIK oscillator when MSIRGSEL is set. 16 frequency ranges are available: Note: MSIKRANGE can be modified when MSIK is off (MSISON = 0) or when MSIK is ready (MSIKRDY�=�1). MSIKRANGE must NOT be modified when MSIK is on and NOT ready (MSIKON = 1 and MSIKRDY = 0) Note: MSIKRANGE is kept when the device wakes up from Stop mode, except when the�MSIK range is above 24 MHz. In this case MSIKRANGE is changed by hardware into�range 2 (24 MHz). 0 (B_0x0): range 0 around 48�MHz 1 (B_0x1): range 1 around 24�MHz 2 (B_0x2): range 2 around 16�MHz 3 (B_0x3): range 3 around 12�MHz 4 (B_0x4): range 4 around 4�MHz (reset value) 5 (B_0x5): range 5 around 2�MHz 6 (B_0x6): range 6 around 1.33�MHz 7 (B_0x7): range 7 around 1�MHz 8 (B_0x8): range 8 around 3.072�MHz 9 (B_0x9): range 9 around 1.536�MHz 10 (B_0xA): range 10 around 1.024�MHz 11 (B_0xB): range 11 around 768�kHz 12 (B_0xC): range 12 around 400�kHz 13 (B_0xD): range 13 around 200�kHz 14 (B_0xE): range 14 around 133 kHz 15 (B_0xF): range 15 around 100�kHz |
| MSISRANGE | MSIS clock ranges These bits are configured by software to choose the frequency range of MSIS oscillator when MSIRGSEL is set. 16 frequency ranges are available: Note: MSISRANGE can be modified when MSIS is off (MSISON = 0) or when MSIS is ready (MSISRDY�=�1). MSISRANGE must NOT be modified when MSIS is on and NOT ready (MSISON�=�1 and MSISRDY�=�0) Note: MSISRANGE is kept when the device wakes up from Stop mode, except when the�MSIS range is above 24 MHz. In this case MSISRANGE is changed by hardware into range 2 (24 MHz). 0 (B_0x0): range 0 around 48�MHz 1 (B_0x1): range 1 around 24�MHz 2 (B_0x2): range 2 around 16�MHz 3 (B_0x3): range 3 around 12�MHz 4 (B_0x4): range 4 around 4�MHz (reset value) 5 (B_0x5): range 5 around 2�MHz 6 (B_0x6): range 6 around 1.33�MHz 7 (B_0x7): range 7 around 1�MHz 8 (B_0x8): range 8 around 3.072�MHz 9 (B_0x9): range 9 around 1.536�MHz 10 (B_0xA): range 10 around 1.024�MHz 11 (B_0xB): range 11 around 768�kHz 12 (B_0xC): range 12 around 400�kHz 13 (B_0xD): range 13 around 200�kHz 14 (B_0xE): range 14 around 133 kHz 15 (B_0xF): range 15 around 100�kHz |