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STMicroelectronics /STM32U5Gx /ADC1 /ADC_AWD2CR

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Interpret as ADC_AWD2CR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0AWD2CH

Description

ADC analog watchdog 2 configuration register

Fields

AWD2CH

AWD2CH

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data