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STMicroelectronics /STM32U5Gx /DSI /DSI_VHBPCR

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Interpret as DSI_VHBPCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0HBP

Description

DSI Host video HBP configuration register

Fields

HBP

Horizontal back-porch duration This fields configures the horizontal back-porch period in lane byte clock cycles.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data