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STMicroelectronics /STM32U5Gx /LPDMA1 /SMISR

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Interpret as SMISR

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https://regviz.com/r/STMicroelectronics/STM32U599/LPDMA1/SMISR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (MIS0)MIS0 0 (MIS1)MIS1 0 (MIS2)MIS2 0 (MIS3)MIS3

Description

LPDMA secure masked interrupt status register

Fields

MIS0

MIS0
MIS1

MIS1
MIS2

MIS2
MIS3

MIS3

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data